1. Field of the Invention
This invention relates to a signal transmission cable driver apparatus which is able to compensate waveform deteriorations at a receiving point of a transmission cable for accurately transmitting signal waveforms of high speed logic signals and the like.
2. Background Art
In transmitting a high-speed logic signal through a long transmission line, it is not easy, at a receiving end (reproduction port), to accurately reproduce the signal waveforms originally provided to a sending end (transmission port). Examples of transmission lines or cables for use in such high speed logic signal transmission include coaxial cables, twist pair cables, and printed circuit board pattern wiring. The transmission cables involve transmission loss which deteriorates the waveforms of the logic signals propagating therethrough.
The transmission loss in such a transmission line is frequency dependent such that a power level of the signal in the line is decreased typically by a root of the frequency (1/2 root) of the signal. The transmission loss also varies depending on the types of transmission medium, typically insulation materials surrounding the cable cores. Major factors of the transmission loss includes a skin effect of transmission line, dielectric loss of insulation material of the transmission line, and the like.
As a result of the transmission loss, the signal waveform is impaired by the time when it reached the receiving port because high frequency components thereof, such as amplitudes of sharp edges, are reduced through the transmission line. Thus, it is not possible to accurately reproduce the original waveforms and/or the original timings of the logic signal at the receiving end.
In case where a logic signal of a narrow pulse width is transmitted through the transmission line, a received signal will be further deteriorate as shown in FIG. 8. In addition to the reduction of the signal amplitude, the reproduced signal at the receiving end may have a pulse width R.sub.w2 which is smaller than a pulse width R.sub.w1 at the sending end. This means that the timing accuracy of the logic signals is also adversely affected by the transmission loss. When the pulse width of the logic signal is too narrow, such a signal may even disappear during the travel through the transmission line.
FIG. 6 shows an example of signal transmission cable driver in the conventional technology which is a differential transmission circuit having a frequency compensation circuit. This circuit has a structure in which a transmission port transmits a differential signal through two coaxial cables or a pair of twist cables and a receiving port receives the differential signal with no reflection by connecting a terminal resistor at the receiving end. As shown in FIG. 6, frequency compensation circuits are provided at both the transmission port and the receiving port to compensate the high frequency components that are lost because of the transmission loss in the transmission cables when traveling through the cables. Each of the frequency compensation circuits is formed with coils and resistors.
The differential transmission circuit of FIG. 6 includes a transmission driver 70, a pair of transmission cables 90, and a transmission signal receiver circuit 80. The transmission driver 70 is formed of a differential driver circuit 72, sending port pull-up resistors 74, and a frequency compensation circuit 75. The transmission signal receiver circuit 80 is formed of a differential receiver circuit 82, terminal resistors 84, and a frequency compensation circuit 85.
FIG. 7 shows waveforms at several points of this transmission circuit. FIG. 7a shows an input transmission signal 100 which is a differential pulse signal of rectangular waveforms provided to a pair of input terminals of the transmission driver 70. FIG. 7b shows a pulse wave 91.sub.WAV at an output of the transmission driver 70. The pulse wave 91.sub.WAV has a high frequency compensated waveform as shown by the shaded portions of FIG. 7b. The high frequency compensated waveform is created by adding a peak current I.sub.peak produced by the frequency compensation circuit 75 to the output of the transmission driver 70.
FIG. 7d shows a waveform 93.sub.WAV received by the transmission receiver circuit 80 at the end of the transmission cable 90. The received waveform 93.sub.WAV has a high frequency compensated waveform shown by the shaded portions which is formed by the peak current produced by the frequency compensation circuit 75 mentioned above as well as a peak current produced by the frequency compensation circuit 85. FIG. 7c shows a logic waveform 81.sub.out that is reproduced by the differential receiver circuit 82. When the frequency compensation circuit 85 is not present, the logic signal 81.sub.out tends to become a signal with an unstable range such as shown in the shaded portions of FIG. 7c, or with timing fluctuations or variations, or jitters.
By utilizing the frequency compensation circuits, such problems of signal waveform deterioration can be avoided. Thus, more accurate reproduction of transmission signals is achieved by maintaining a predetermined relationship, i.e., compensating the transmission loss in the high frequency range between the input transmission signal 100 and the output logic signal 81.sub.out.
For a transmission circuit that requires high timing accuracy, the output logic signal 81.sub.out is required to have an accurate timing reproduction that corresponds to the timing of the input transmission signal 100. The frequency compensation circuits 75 and 85 are effective to achieve this goal. The frequency compensation circuit 75 in the sending port includes coils 76 and resistors 78 for peaking the input logic signal 100 to be transmitted. The frequency compensation circuit 85 of the receiving port includes coils 86 and resistors 88 in series with the terminal resistor 84 for peaking the received logic signal. The example of FIG. 6 is a case wherein both the sending port and the receiving port include the frequency compensation circuits. However, another configuration is possible in which only one of the ports has a frequency compensation circuit. The above circuit configuration is used for transmission of high-speed, high timing accuracy signals through a plurality of transmission cables such as between a main frame of a semiconductor test system and a test head.
In the foregoing transmission circuit, all of the circuit components, with the exception of the peaking coils 76 and 86, can be integrated into an LSI circuit relatively easily through a monolithic IC process. However, the peaking coils 76 and 86 need to have a winding structure. Thus, although means for miniaturizing coils by chip inductor, etc. has been developed, further drastic miniaturization is difficult. In particular, integration of the coils into a monolithic IC such as an LSI is practically impossible. Thus, coils are major factors in the high speed logic transmission that prevent further improvement of the mounting density in the transmission apparatus. This mounting density problem will be especially serious in semiconductor test apparatuses, super high-speed computers, and automatic switching systems which require high-speed logic signal transmission through multiple channels.